微软宣布 Maia 300 芯片将成主力推理系统,2027年量产
Satya Nadella officially announced that Microsoft will make its in-house Maia ch…
AI 算力供应链的关键变量,微软自研芯片从实验走向大规模商用,直接影响行业格局,值得从业者关注。
Satya Nadella officially announced that Microsoft will make its in-house Maia chips the primary inference system for its products, scaling to multiple gigawatts.
萨提亚·纳德拉正式宣布,微软将使其自研的 Maia 芯片成为其产品的主要推理系统,并扩展至数吉瓦级别。
This will make it less reliant on NVIDIA hardware, and Maia 300 is meant to replace AMD chips too, not only Nvidia. The key claim is 40% more tokens per megawatt than leading GPU-based systems
这将降低对 NVIDIA 硬件的依赖,Maia 300 旨在取代 AMD 芯片,而不仅仅是 Nvidia。关键主张是每兆瓦的 token 吞吐量比领先的基于 GPU 的系统高出 40%。
A full rack packs 96 accelerators into 167kW with 27.6TB of HBM, and Microsoft claims it delivers up to 7x the token throughput of a Maia 200 rack.
一个完整的机架在 167kW 功耗下容纳 96 个加速器,配备 27.6TB 的 HBM,微软声称其 token 吞吐量可达 Maia 200 机架的 7 倍。
The shift will start in 2027 with Maia 300, a third-generation accelerator built for long-context reasoning, low-latency chat and multi-step agent tasks.
这一转变将从 2027 年开始,推出第三代加速器 Maia 300,专为长上下文推理、低延迟聊天和多步骤代理任务而构建。
Its predecessor, Maia 200, already serves production traffic including Microsoft Copilot and Microsoft claims Maia 200 produces up to 1.7x more tokens per watt than leading GPU infrastructure.
其前身 Maia 200 已服务于包括 Microsoft Copilot 在内的生产流量,微软声称 Maia 200 每瓦特产生的 token 数量比领先的 GPU 基础设施多出 1.7 倍。
Maia 300 goes after the cost of moving data, which Microsoft says now limits large inference systems more than raw arithmetic does.
Maia 300 致力于解决数据移动的成本问题,微软表示目前限制大型推理系统的因素不再是原始算术能力,而是数据移动成本。
Maia 300 uses a “multi-chiplet” design, A traditional chip is one large slab of silicon that does everything: the math (compute), managing the memory (memory controller) and talking to other chips (I/O). Maia 300 instead splits those jobs into several smaller pieces of silicon, called chiplets, packaged together so they act as one chip. That leaves more room on the compute chiplets for the parts that actually run the AI math, and each chiplet can be made with whatever manufacturing process suits its job best.
Maia 300 采用“多芯粒”设计。传统芯片是一块执行所有功能的大硅片:数学计算(计算)、管理内存(内存控制器)以及与其他芯片通信(I/O)。Maia 300 则将这些任务拆分为多个较小的硅片部分,称为芯粒(chiplets),封装在一起以作为一个芯片运行。这使得计算芯粒上有更多空间用于实际运行 AI 数学运算的部分,并且每个芯粒都可以使用最适合其任务的制造工艺制造。
Each chip pairs 8 HBM4 stacks delivering 18.0 TB/s of peak bandwidth with a 950W TDP, and uses on-die SRAM as a scratchpad to relieve that memory.
每个芯片配对 8 个 HBM4 堆栈,提供 18.0 TB/s 的峰值带宽,TDP 为 950W,并使用片上 SRAM 作为暂存区来缓解内存压力。
Support for low-precision formats such as an enhanced MXFP4 shrinks the KV cache, the stored attention state that grows with every token, so longer contexts fit within the same power budget.
支持如增强型 MXFP4 等低精度格式可缩小 KV 缓存(随每个 token 增长的存储注意力状态),从而使更长的上下文能够适应相同的功耗预算。
Supply is the harder constraint, since Microsoft has reportedly been negotiating with TSMC for more than 300,000 Maia 300 units for 2027 delivery, a figure still under negotiation rather than a signed purchase order.
供应是更难的约束条件,因为据报道微软一直在与台积电协商,为 2027 年交付超过 300,000 个 Maia 300 单元,该数字仍在谈判中,而非已签署的采购订单。
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