AMD发布ROCm 10.1：优化数据移动与开发工具

ROCm 10.1: Breaking the Data-Movement Bottleneck#

October 05, 2026 by Adam Chan, Amy Wiebe, Liam Berry, Saad Rahim, Danny Guan, Anshul Gupta.

6 min read. | 1408 total words.

Ecosystems and Partners

AI/ML, Fine-Tuning, Linear Algebra, Compiler, Hardware, Computer Vision, Installation, JAX, LLM, Memory, Multimodal, Optimization, Performance

AI, Developers, HPC, Systems

What limits your training run today: how fast the GPU computes, or how fast you can get data to it? For a growing number of workloads, the answer is the latter. ROCm 10.1 leads with that path, and carries a full slate of compiler, library, and tooling work behind it.

Raw accelerator throughput is still a limiting factor, but as AI models and HPC datasets scale, an emerging bottleneck is feeding those accelerators data. Checkpoints, key-value caches, and model parameters now outgrow the fast memory nearest to the GPU, and the data path from storage to the device becomes the largest bottleneck. ROCm 10.1 addresses this shift with substantive improvements in its AMD Infinity Storage technology and the HIP runtime. hipFile gains additional capabilities to smoothly move data directly between storage and the GPU. The HIP runtime adds NUMA-aware host memory allocation, which places memory close to the compute that uses it.

Beyond data paths, ROCm 10.1 advances the developer workflow. AMD’s growing catalog of AMD Skills, complemented by the ROCm CLI, gives coding agents standardized integrations to set up local AI, diagnose ROCm issues, and optimize LLM inference on AMD hardware.

Next-Generation Storage and I/O with AMD Infinity Storage#

As model parameters, checkpoints, and key-value (KV) caches grow, storage increasingly becomes the bottleneck that starves the GPU rather than feeds it. AMD Infinity Storage (AIS) debuted in ROCm 7.14 as a library that moves data directly between storage and memory without routing it through CPU memory.

Comparison of the traditional storage path through host RAM versus the new hipFILE path that moves storage directly to the GPU#

AMD builds on this foundation with three hipFILE improvements that reduce unnecessary data movement and increase accelerator utilization:

• Asynchronous Fast-Path Backend. Read and write requests now run directly on a HIP stream, skipping the host-memory staging step through which data traditionally passes. This reduces latency and increases sustained throughput for checkpoint engines and KV-cache offloading systems, improving end-to-end responsiveness.
• Batch I/O API. Submits multiple file requests at once and dispatches them across an internal pool of worker threads, improving utilization across storage devices for large training datasets and data-intensive inference pipelines.
• Multi-Tier I/O Statistics. Progressively richer hipFILE telemetry flows to ROCm profiling tools, making it easier to determine whether a workload is limited by compute, memory, or data delivery.

NUMA-Aware Host Memory Allocation with HIP#

Adding more CPUs and GPUs does not automatically improve performance if data must travel between sockets to reach the compute using it. ROCm 10.1 helps reduce this overhead by extending HIP virtual memory management to let applications allocate host memory on a specific CPU NUMA node instead of falling back to generic memory pools. Libraries like RCCL can use this to build NUMA-local, zero-copy communication pipelines that keep data movement close to the compute that needs it, reducing unnecessary traffic between sockets.

ROCm 10.1 also brings ROCm CLI v1.0.0, which provides a single-binary tool for installing, configuring, and running local AI workloads on AMD GPUs. AMD has added first-class support for both ROCm 10.0 and ROCm 10.1, including automatic detection of compatible flash-attn and amd-aiter wheels for vLLM. The rocm install command handles the new ROCm 10 “next” package layout out of the box and provides a flag to enable fully non-interactive installs for scripted or CI environments. A full-screen TUI dashboard provides live GPU telemetry alongside model serving and chat. ROCm CLI is available on Linux, Windows, and WSL2.

Where the CLI is the tool a developer runs directly, AMD Skills brings that same ROCm expertise to AI coding agents. Each skill packages verified configurations into a standardized integration that agents like Claude Code and Codex can apply consistently. AMD is highlighting two new skills that were added in this release:

• quark-install installs or verifies AMD Quark with a PyTorch build that matches your accelerator (PyPI, wheel index, local wheel, or source), then checks imports, kernels, and quark-cli.
• quark-torch-llm-ptq runs post-training quantization on PyTorch / Hugging Face LLMs. It inspects the model, helps you pick a scheme (FP8, INT4 and more), and produces a verified quantized model.

Each skill is owned and versioned by the team behind the product it describes, and the list is expected to grow as more skills land.

Developer Tools#

The ROCprofiler-SDK introduces kernel replay (currently in beta), which collects a full counter set in one application run instead of rerunning the application once per counter group. Because GPUs can collect only a limited number of hardware performance counters per kernel dispatch, kernel replay re-executes each dispatch in place and restores tracked device memory between passes. ROCprofiler-SDK also lets AI framework profilers, such as PyTorch’s Kineto and Triton’s Proton, start and stop at any point during a run. A new PC sampling agent skill in ROCprofiler-SDK guides AI coding assistants through running rocprofv3 PC sampling on your application and reporting hotspots and stall reasons.

ROCm Compute Profiler’s standalone roofline report is now an interactive HTML page where you can isolate a single kernel or roof and switch the arithmetic-intensity axis between cache levels. Its PC sampling analysis now reports results per kernel, down to sample and stall counts on individual instructions. For inference workloads, a new guide covers profiling vLLM with Compute Profiler.

ROCm Systems Profiler now supports Gorgon Point 1, 2, and 3 APUs (gfx1150, gfx1152, and gfx1153) on Linux, so you can trace CPU and GPU activity together for workloads running on these integrated GPUs. ROCm Optiq extends its unified visualization and analysis capabilities to support rocprofv3, enabling developers to visualize and analyze the latest profiling data within Optiq’s unified interface alongside ROCm Systems Profiler traces and ROCm Compute Profiler analysis.

LLVM 24 and Faster Rebuilds#

ROCm 10.1 moves compiler development onto LLVM 24, bringing a host of new features and optimizations from the LLVM community, including reduced rebuild times for large projects. The amdclang++ compiler advances from LLVM 23 to LLVM 24, delivering newer C++ language support and community optimization benefits.

ROCm 10.1 also speeds up incremental builds by caching the partitions that link-time optimization (LTO) creates when it splits HIP device code. As a result, a small change can reuse unchanged partitions instead of rebuilding them from scratch.

Upgrade note: If you’re upgrading from ROCm 10.0, this is a major compiler version change. The clang_major version macro now reports 24. Review any code or build scripts keyed to a specific compiler version, along with any tools that link directly against libLLVM.

Advancing AI and Math Libraries#

ROCm 10.1 also updates its AI and math libraries with expanded kernel support, compiler improvements, and more efficient sparse operations:

• Composable Kernel: AMD’s library of optimized AI kernels speeds up attention on Radeon GPUs and brings more quantized matrix-multiply types to its kernel dispatcher.